Real device physics is complicated. Successful modeling and simulation is largely about what to leave out of a model of the real device. This is especially true at the design stage of the project when reasonably accurate but approximate simulations must be performed quickly to support the design iterations that are required to optimize performance. We believe this is best accomplished through the template framework.

The device template allows the designer to work with a simplified representation with just enough detail to obtain an accurate temperature distribution at the locations that most affect performance and reliability. As demonstrated in the Users Manual (Top-Down Analysis), sufficient detail can be included in a template to get accurate junction temperatures for high-electron mobility field-effect transistors in power amplifiers, but a template is not forced to have the same level of detail for other parts of the layout. Working directly from the CAD layout files, however, forces thermal simulations to process a lot more information, most of which is irrelevant to thermal analysis, slowing down the design process or forcing thermal performance to be ignored during the circuit design phase. The level of detail in a template can be tailored to the particular type of thermal analysis needed, such as including the individual gates in power amplifier FETs while simplifying other types of devices to rectangular heat sources.

The sophisticated, open-source, and fully-documented template format allows each engineering team to develop its own design kit for thermal analysis. Team members familiar with the thermal aspects of the manufacturing process (3D device structure, chip packaging, material properties, etc.) can easily create a family of device templates that will provide the circuit designers with high-fidelity finite element models that can be incorporated into their design process. Important features of the model can be parameterized inside the template. These design parameters are then exposed to the circuit designers through the SYMMIC user interface to allow temperature-aware design. For example, a FET could be parameterized by the number and width of the gates, gate-to-gate spacing, gate-to-drain distance, thickness of secondary metal layers, length of the field plate, heating profile as a function of field plate and gate voltage, and so on. Just about anything that is modifiable in the foundary process can be made adjustable in device templates. Circuit designers are then free to make the necessary tradeoffs to obtain optimal performance without needing new models or simulations from other team members expert in using general purpose finite-element software.

Thermal Considerations in Low Cost T/R Module Design
SYMMIC thermal analysis of a Multi-function Phased Array Radar (MPAR) transmit/receive module over a range of power levels and duty cycles.

Steady State and Transient Thermal Analyses of GaAs pHEMT Devices
A study of the effects of model fidelity on the accuracy of SYMMIC thermal analysis, using temperatures obtained by electrical measurements of the gate resistance.

Thermal modelling of multifinger GaAs/GaN FETs using SPICE

Selective Growth of Diamond in Thermal Vias for GaN HEMTs

Parameter Extractions for a GaAs pHEMT Thermal Model Using a TFR-Heated Test Structure

Study of Gate Junction Temperature in GaAs pHEMTs Using Gate Metal Resistance Thermometry

Impact of Bias and Device Structure on Gate Junction Temperature in AlGaN/GaN-on-Si HEMTs

A scalable linear model for FETs

An Electrical-Thermal Coupled Solution for SiGe Designs

Transient gate resistance thermometry demonstrated on GaAs and GaN FET

Characterisation of GaAs pHEMT Transient Thermal Response

An Ultra Compact Watt-Level Ka-Band Stacked-FET Power Amplifier

Development and verification of a scalable GaAs pHEMT FEM thermal model

Accelerated lifetime testing of GaN-on-SiC HEMT

Nonlinear modelling of GaAs and GaN high electron mobility transistors

A 1.5kW 90V S-band GaN Transistor for Air Traffic Control Radars